Que: 1. The disadvantage of CISC design processors is
|
| a. low burden on compiler developers |
| b. wide availability of existing software |
| c. complex in nature |
| d. none of the above |
Que: 2. The RISC architecture is preferred to CISC because RISC architecture has
|
| a. simplicity |
| b. efficiency |
| c. high speed |
| d. all of the mentioned |
(d). all of the mentioned
Que: 3. The feature of RISC that is not present in CISC is
|
| a. branch prediction |
| b. pipelining |
| c. branch prediction and pipelining |
| d. none of the above |
(c). branch prediction and pipelining
Que: 4. The feature of hybrid CISC-RISC architecture is
|
| a. consume a lot of power |
| b. not applicable for mobile applications |
| c. processed by RISC core |
| d. all of the mentioned |
(d). all of the mentioned
Que: 5. Which of the following is an application of RISC architecture by adding more instructions?
|
| a. multimedia applications |
| b. telecommunication encoding |
| c. image conversion |
| d. all of the mentioned |
(d). all of the mentioned
Que: 6. Which of the following processor belongs to hybrid RISC-CISC architecture?
|
| a. Intel Pentium III |
| b. Intel Itanium 64 |
| c. AMD’s X86-64 |
| d. all of the mentioned |
(d). all of the mentioned
Que: 7. In order to implement complex instructions, CISC architectures use
|
| a. macroprogramming |
| b. hardwire |
| c. microprogramming |
| d. none of the above |
Que: 8. The advantage of RISC processors is
|
| a. can operate at high clock frequency |
| b. shorter design cycle |
| c. simple and fast |
| d. all of the mentioned |
(d). all of the mentioned
Que: 9. The additional functionality that can be placed on the same chip of RISC is
|
| a. memory management units |
| b. floating point units |
| c. memory management and floating point arithmetic units |
| d. RAM, ROM |
(c). memory management and floating point arithmetic units
Que: 11. The number of CPIs(Clock Per Instruction) for an instruction of RISC processors is
|
| a. 0 |
| b. 1 |
| c. 2 |
| d. 3 |